MAP

The MAP script is listed below.

#!/bin/bash

map -p xc3s1500l-fg676-4 -ignore_keep_hierarchy -timing -ol high -cm area -pr b -k 4 -c 100 -tx off -o test_map.ncd synt.ngd

As in previous cases only part of the tool output report is given in this doc.

Release 7.1i Map H.38

Xilinx Mapping Report File for Design 'leon_pci'

Design Information

------------------

Command Line : map -p xc3s1500l-fg676-4 -ignore_keep_hierarchy -timing -ol

high -cm area -pr b -k 4 -c 100 -tx off -o test_map.ncd synt.ngd

Target Device : xc3s1500l

Target Package : fg676

Target Speed : -4

Mapper Version : spartan3 -- $Revision: 1.26.6.3 $

Mapped Date : Sun Aug 12 22:20:54 2007

Design Summary

--------------

Number of errors: 0

Number of warnings: 7

Logic Utilization:

Number of Slice Flip Flops: 3,233 out of 26,624 12%

Number of 4 input LUTs: 12,970 out of 26,624 48%

Logic Distribution:

Number of occupied Slices: 8,331 out of 13,312 62%

Number of Slices containing only related logic: 8,331 out of 8,331 100%

Number of Slices containing unrelated logic: 0 out of 8,331 0%

*See NOTES below for an explanation of the effects of unrelated logic

Total Number 4 input LUTs: 14,418 out of 26,624 54%

Number used as logic: 12,970

Number used as a route-thru: 296

Number used for Dual Port RAMs: 1,152

(Two LUTs used per Dual Port RAM)

Number of bonded IOBs: 165 out of 487 33%

IOB Flip Flops: 102

Number of Block RAMs: 19 out of 32 59%

Number of GCLKs: 2 out of 8 25%

Total equivalent gate count for design: 1,433,586

Additional JTAG gate count for IOBs: 7,920

Peak Memory Usage: 335 MB