#!/bin/perl

open(FPR, $ARGV[0]) || die("open fail $ARGV[0]\n");

while(eof(FPR) != 1) {
  $line=<FPR>; chomp($line); $line=lc($line);
  if($line =~ /[io][nu].* std_logic/) {
    $width=1;
    if($line =~ /std_logic_vector/) {
      if($line =~ /([0-9]*) *downto *([0-9]*)/) {$width=$1-$2+1;}
    }
    if   ($line =~ /: *in */)  {$io="in";}
    elsif($line =~ /: *out */) {$io="ou";}
    else {die("can not figure io direction \n$line\n");}
    if($line =~ /^ *([a-zA-Z].*) *: *[oi]/) {
      $sig_name=$1;
      $sig_name =~ s/ //g;
    }
    $buf=$sig_name . ": ";
    if($io eq "in") {$buf=$buf . "out simple_port of ";}
    else            {$buf=$buf . "in  simple_port of ";}
    if($width == 1) {$buf=$buf . "bit is instance;"}
    else            {$buf=$buf . "uint (bits:" . $width . ") is instance;"}
    print ("$buf\n");
    $buf="keep bind(" . $sig_name . ", external);";
    print ("$buf\n");
    $buf="keep " . $sig_name . ".hdl_path() == \"" . $sig_name . "\";";
    print ("$buf\n\n");
  }
  elsif($line =~ /^ [\t ]*--/) {print("$line\n");}
}#while

close(FPR);