ASIC/FPGA Design and Verification Out Source Services
IP TTL filter
digital design, implemented in VHDL.
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This project implements an IP TTL filter in hardware. If an IPV4
packet is identified, the DUT checks its TTL field. Based on previous values of TTL in former packets,
the machine decides if the packet is spoofed or not. The main page
of this
project.;
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This page describes the simulation end procedure. First the simulation ends with an assert statement with
error severity. I put ended okay in the message, so I easily see its successful end.
assert false report "simulation ended okay from
process p_2" severity error;
As opposed to a real error report:
assert tmp_ptr.next_rec /= null report "end of packet list too early 1"
severity error;
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When the simulation ends, I also need to print all the entries in the scoreboard of the reference model (
to be described soon).
...
signal sim_end : boolean := false;
...
--wait before end
sim_end <= true;
for j in 1 to 31 loop
wait until rx_clk'event and rx_clk = '1';
end loop;
assert false report "simulation ended okay from process p_2" severity error;
end process;--p_2
...
begin
if(rx_clk'event and rx_clk = '1') then
v_spoofed_q <= '0';
if(sim_end and scbd_print) then
scbd_print := false;
assert false report "scoreboard print" severity warning;
--add an empty entry at the end
new_sbd.ips := (others => '0');
new_sbd.ttl := (others => '0');
new_sbd.cnt := (others => '0');
new_sbd.pkt_in_t := 0 ns;
new_sbd.next_rec := null;
tmp_ptr := scbd_ptr;
while(tmp_ptr.next_rec /= null) loop
tmp_ptr := tmp_ptr.next_rec;
end loop;
tmp_ptr.next_rec := new_sbd;
tmp_ptr := scbd_ptr;
while(tmp_ptr.next_rec /= null) loop
write(my_line, sim_end'path_name);
write(my_line, string'(" ips "));
hwrite(my_line, tmp_ptr.ips);
write(my_line, string'(" ttl "));
hwrite(my_line, tmp_ptr.ttl);
write(my_line, string'(" cnt "));
hwrite(my_line, tmp_ptr.cnt);
if(tmp_ptr.learning) then
write(my_line, string'(" learning "));
else
write(my_line, string'(" checkSpf "));
end if;
write(my_line, string'(" packet in time "));
write(my_line, tmp_ptr.pkt_in_t);
writeline(output, my_line);
tmp_ptr := tmp_ptr.next_rec;
end loop;
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