This page extends the example from cadance of producer consumer.

1. Recently I started to study the producer consumer example in systemc 2.0.


2. The example, from cadance, has one producer and consumer talking to each other via FIFO interface:
   
   class top : public sc_module
   {
     public:
     fifo *fifo_inst;
     producer *prod_inst;
     consumer *cons_inst;
   


3. In the example the producer send charters to the consumer. In my example a transaction class is used:
   
   class c_trans {
     public:
     unsigned seq_n;
     unsigned data[8];
     c_trans();
     c_trans(unsigned da_i[], unsigned s);
   };
   c_trans::c_trans() {
     for(unsigned i=1; i <=8; i++) data[i-1]=0;
     seq_n=0;
   };
   c_trans::c_trans(unsigned da_i[], unsigned s) {
     seq_n=s;
     for(unsigned i=1; i <=8; i++) data[i-1]=da_i[i-1];
   };
   


4. I use two constructors:
   
   void main()
   {
     unsigned da[8]={1,2,3,4,5,6,7,8};
     const c_trans arr[2] = {c_trans(), c_trans(da, 1)};
   
     unsigned i;
     for(i = 0; i <= 1; i++)
       out->write(arr[i]);
   
   


5. The system C code is available for free at producer consumer code .



6. This site also includes an I2C verification environment, which uses memories and VPI (c code) to drive stimuli and a reference model using a c++ scoreboard to check data, which is collected from a verilog DUT output.

Home	some memory VHDL models A simple c-code program to read a memory array from verilog RTL, using VPI.