ASIC/FPGA Design and Verification Out Source Services
My First VPI Program
This page shows a simple VPI program that interacts with a VERILOG code. VPI is the C-Programming interface to the Verilog HDL.
- The program is tested mainly with free VERILOG simulator - icarus. It has also checked on NCSIM simulator.
- The VERILOG code is simple. A counter value is decoded and on some value the VPI is called.
- The VPI program prints the module name; the simulation time and a VERILOG register value. The later use the integer format.
- The VERILOG new system task invocation is shown below:
always @ (posedge clk) begin
if(cnt == 4'd2) begin
$reg_acc(cnt);
$display("dbg %d", $time);
end
-
The functional part of the VPI c-code program is shown below:
static int reg_acc_calltf(char*user_data)
{
vpiHandle h1, h2, h3;
h1 = vpi_handle(vpiSysTfCall, NULL);
h2 = vpi_iterate(vpiArgument, h1);
h3 = vpi_scan(h2);
vpi_printf("the name of the handle is %s\n", vpi_get_str(vpiFullName, h3));
s_vpi_time time;
time.type = vpiSimTime;
vpi_get_time(NULL, &time);
vpi_printf("at %d\n", time.low);
s_vpi_value val;
val.format = vpiIntVal;
vpi_get_value (h3, &val);
vpi_printf("the value is %d\n", val.value.integer);
vpi_free_object(h2);
return 0;
}
- The NCSIM simulation is done using the irun utility:
irun reg_acc.v reg_acc.c vpi_user.c -loadvpi :reg_acc_calltf
- The following bash script is used:
#!/bin/bash
rm $1.vvp *.vcd
iverilog-vpi $1.c || exit
iverilog -o$1.vvp $1.v || exit
vvp -M. -m$1 $1.vvp || exit
-
The output looks like (icarus)
VCD info: dumpfile vpi.vcd opened for output.
the name of the handle is cntM.cnt
at 25
the value is 2
dbg 25
the name of the handle is cntM.cnt
at 185
the value is 2
dbg 185
the name of the handle is cntM.cnt
at 345
the value is 2
dbg 345
- The entire package, my_first_vpi.tar.gz, is at the download area see below. You can also download it directly from: direct load
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