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Verilog Coding Guidelines

This document describes coding styles and guidelines for writing Verilog code for combinatorial logic and registers.
I think that separation between combinatorial logic and register code is a very good practice. Among the reasons for doing that are:

1. readability
   Having the combinatorial logic in a separate area than the register code helps a lot in maintainability and readability of the code.
2. compatible with Icarus free verilog simulator
   icarus is great free verilig simulator. On very rare occasions I fount that it errs, when combinatorial logic is in the register process. While the fix is immediate, locating in code the error is not an easy task at all.
   

KO
always @ (posedge clock) begin
q <= a & b;
end
OK
wire qi;
assign qi=a & b;
always @ (posedge clock) begin
q <= qi
end




3. When a Global change is required
   What if you need to change all your registered code to have synchronous reset for instance. When you have all of your code written in a similar way with no combinatorial at the input equation, the code lends itself for an automatic change by script.You may also use it to prepare your code for test scan, etc ...

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