ASIC/FPGA Design and Verification Out Source Services
simple bash script to compile vhdl design using the ghdl
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The following is a simple bash script to
compile a VHDL design and test bench using
ghdl.
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Since the operator || and && did not work,
I captured the output into a file. If the new
created file, has a size greater than 0, this
is probably an error.
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The script uses sed to extract the size
printed by a du command.
#!/bin/bash
if [ -d "work" ] ; then
rm -fr work
mkdir work
fi
if [ -e "tmp.txt" ] ; then
rm -f tmp.txt
fi
ghdl -i --warn-no-vital-generic --workdir=work *.vhd >& tmp.txt
sz=`du tmp.txt | sed 's/\(^[0-9]*\).*/\1/'`
echo $sz
ok="0"
if [ "$sz" -eq "$ok" ] ; then
echo "compilation ended ok"
ghdl -m --warn-no-vital-generic --workdir=work -P~/Home_2/VHDL_IP_Stack/CODE/PostNGDsim/unisim --ieee=synopsys -fexplicit TB
else
less tmp.txt
fi
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A similar script can be seen at:
AHB non free project
This AHB project is a VHDL project, made of two AHB masters, one arbiter,
one AHB to APB bridge and one simple APB slave. If you are interested in
this project as a graduate project,
contact me via mail and put in the subject: non free AHB project.
Please let me know what you think on my site.
Contact me now at: |