Email: bknpk@hotmail.com Phone: +972-54-7649119
V

 

ASIC/FPGA Design and Verification Out Source Services

simple bash script, which demonstrates generation of a random number within a specified range and writing the result into a VHDL file.

  1. In a regression script, I needed to add some random delay, before issuing a SD abort command.

  2. This was needed to a self developed SD project, which is described at: SD slave project.

  3. I created a bash script to generate an integer within a range (0 to 499) and save the number in a VHDL test file.
    The random generation is done by a bash function. Part of the script is shown below:

  4. The project is simulated using the free VHDL simulator, GHDL.
    All test options are given via a VHDL package, so compilation is required, before running a new test. Therefor I decided, that if random generation is done by script, it will not be too problematic in this case.


  5. #put random delay to TB
    #drive_sd_clk(200, CLK);--random by script
    f_rand_CMD_12_delay()
    {
      max_v="500"
      gen_v=$(($RANDOM % $max_v))
      echo "cmd 12 read block abort delay num of cycles "$gen_v >> reg_rep.log
      sed -i "s/\(.*\)drive_sd_clk.*--random by script/\1drive_sd_clk($gen_v, CLK);--random by script/" sd_tester.vhd
    }

    rm -f reg_rep.log

    f_rand_CMD_12_delay
    ...
    ...


  6. To complete the bash function an example with a function call with parameters is shown. The example is simple one to demonstrate its usage and syntax.

    #!/bin/bash


    f_bak()
      {
        echo "bak of "$1
        cp $1 $MY_P/Docs/KUKU/TempWork/ -f

        #list the date of the new copied file
        s0=`ls -l $MY_P/Docs/FFT_HLA/TempWork/$1`
        s1=`echo $s0 | sed "s/.*\([JFMAJSOD][aepuoc][a-z][ \t][ \t]*[0-9][0-9 : \t]*\).*/\1/g"`
        echo $s1
      }

    f_bak doc_bd.xlsx
    f_bak demo_1.docm
    f_bak prlim_1.vsd



  ...

Home

Run a perl script from vim on a block, to create a list of all c, c++ loaded files.

SD slave with Samsung flash (k9f1208) (vhdl project).






Search This Site


Feedback This Site




new pages on this site