ASIC/FPGA Design and Verification Out Source Services

VPI memory model

Code Description.

1. This page describes the code of the memory, which is implemented in c language, using VPI, to access signal from verilog RTL.


2. The code is invoked from the verilog using the following system task.
   ...
   always @ (ad or rd) begin
     if(rd) $mem_acc(ad, di, rd, wr, do);
   end
   always @ (posedge ck) begin
     if(wr) begin
       $mem_acc(ad, di, rd, wr, do);
     end
   end
   ...


3. A basic memory entry is build from address and data:
   typedef struct _Entry{
     int ad;
     int da;
   } Entry;
   


4. The data is accessed via VPI functions like: mem_acc_calltf. The variables are accessed by getting an handle. In the following partial code the address if stored in the c code variable ad.
   ...
   static int mem_acc_calltf(char*user_data)
   {
     vpiHandle h1, h2, h3;
     h1 = vpi_handle(vpiSysTfCall, NULL);
     h2 = vpi_iterate(vpiArgument, h1);
   
     static unsigned int mem_sz=0;
     unsigned int ix;
     s_vpi_value ad, di, rd, wr, Do;
     char rd_match;
     static Entry *ptr;
   
   
     h3 = vpi_scan(h2);
     ad.format = vpiIntVal;
     vpi_get_value (h3, &ad);
   ...
   


5. To go to the main page of this project: main

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a reference model in systemc using queues, from C++ STD.