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ASIC/FPGA Design and Verification Out Source Services

Code Indentation



The following set of scripts indent a code, which is written in e (specman) or verilog or vhdl. The motivation for indentation is to have all code with the same indentation using spaces only (no TABs). Using spaces for indentation makes the indentation independent of the editor and its configuration, which is used. In some cases the code writer does not care much about indentation and some automatic way of indentation is required.
Sometimes a block of code is not complete, be it VHDL, verilog or specman, and it is difficult to find where a {} (e) is missing. When running the script, it would try to find the number of first mis-match. The default indentation size is two spaces.
The script modified output file is written always to a file named 2.e. The user than should use diff -w and confirm the changes.

  1. How to use : perl ind.pl my_code.e
  2. How to use : perl ind_verilog.pl my_code.v
  3. How to use : perl ind_vhdl.pl my_code.vhd

  4. Note: if the file is in DOS format, you may want to first run dos2unix on the file.



  5. Note that one can also automatically indent using gvim by the operator ==.
    For instance 20== will indent 20 lines from current position of the cursor.

  6. Recently I modified the specman and system verilog script to be run from within VIM. Many scripts, to be run from within VIM are available in this site,as an example: parse a VR_AD file and generate write operation commands.
    To run the script on the entire file or on part of it do:

    :'a,'b !perl ~/bin/vim_ind.pl
    :%!perl ~/bin/vim_ind.pl
    :%!perl ~/bin/vim_sv.pl

  7. All files are available in the following page indent scripts

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