This pages describes the UART TX signal map file.
This file declares all ports that are used in this eVC.
package pk_rx;
unit sig_map_u {
clk_p: in simple_port of bit is instance;
rst_p: in simple_port of bit is instance;
keep bind(clk_p, external);
keep bind(rst_p, external);
event clk_r_ev is rise(clk_p$) @sim;
ck_en_p: in simple_port of bit is instance;
keep bind(ck_en_p, external);
full_clr_p: inout simple_port of bit is instance;
keep bind(full_clr_p, external);
rx_in_p: inout simple_port of bit is instance;
keep bind(rx_in_p, external);
full_p: in simple_port of bit is instance;
keep bind(full_p, external);
d_out_p: in simple_port of byte is instance;
keep bind(d_out_p, external);
};--unit sig_map_u
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