UDP sequence item - debug tip

1. For the UDP generation scheme, I have considered a few approaches of layered sequence drivers. Since I do this project as a self study project, all by myself, I decided on a simple generation.


2. In this page I discuss ways for initial code debug. The UDP item consists three parts:
   
   1. Common part,
   2. ARP only part,
   3. UDP IP only part.


3. Since I have limited access to training license and since the code is developed after work time, it is highly important to do an initial check for the code:
   
   1. Cleanup any syntax errors.
   2. Check that default values are generated properly.


4. For quick compilation and simulation of a single file, I selected irun, quick multipurpose compile simulation utility, to load and test my file.
   At the end of the file, add a debug instantiation under sys:
   extend sys {
     dbg : ARP pkt_s;
     post_generate() is also {
       outf("dbg l3_data_l\n");
       print dbg;
       for each in dbg.l3_data_l {
         if(index > 0 && (index % 8) == 0) then { outf("\n");};
         outf("%02x ", it);
       };
       outf("\n");
       print dbg.mac_dst_add_l using hex;
       print dbg.mac_src_add_l using hex;
     };
   };
   

Commands for compilation:

1. Using irun:
   irun udp_ip_pkt.e
   test
   exit
   


2. Using specman:
   specman
   load udp_ip_pkt.e
   test
   exit
   


5. The code of the initial UDP sequence item is available on this site.

Home	VHDL IP Stack Based on a VHDL simple UART, I created a small verification eVC