ASIC/FPGA Design and Verification Out Source Services

SD slave with Samsung flash (k9f1208) read burst.

1. This page is part of SD project: go -->


2. This project from a free SD verilog project, which is available in this site: go -->
   The test-bench and RTL code were translated to VHDL. A read burst was also added to improve the read access speed from flash.


3. The next wave shows a general flow of read burst:
   
   
   
   
   The first part shows the activity on the SD lines in a four bit configuration. Next is the lines of the flash and some internal logic signals. Note that only one flash command phase is required (read multiple block CMD23 and CMD18).


4. More information, describing the read burst, will be available soon:
   
   1. SD slave with Samsung flash (k9f1208) read burst: the command phase. go -->
      



5. For more details, on this project, please e mail me to bknpk@hotmail.com . Put SD flash in the e mail subject.