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The USB TX

This module gets its data from the USB function and transmits it to the USB lines.

1. The input clock is 48MHz. The transmit rate is 12MHz. The counter div_clk_q is used for clock division. The counter is enabled when there is data from the USB function.
2. The input data is parallel and is required to be converted to serial. The signal p2s_q is used for the conversion. If there is no data, p2s_q is loaded with 0x80 (full speed SYNC). When USB function asserts the ready, its parallel data is loaded. When the signal bitstf is asserted, the data is shifted out. The counter bit_cnt is used for bit stuff:
3. A zero is inserted after every six consecutive ones in the data stream before the data is NRZI encoded, to force a transition in the NRZI data stream.
4. The tarnsmit logic uses a state machine to detect end of packet. The machine uses a counter, p2s_cnt, to count the number of shfit out bits.
5. usb tx eop state machine state machine

6. The output enable is generated with the following simple -one bit -state machine: usb tx out enable state machine

7. Data is first clocked into nrzi_1q. It than used to generate the NRZI output.: NRZI generation

8. The following link shows waves of a USB transmit of BYTE 0xD2: usb tx waves - transmit of 0xD2

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