ASIC/FPGA Design and Verification Out Source Services
NRZI logic
The following is description of the FF device input equation of the NRZI.
assign nrzi_1i=
(!txvalid && !eop[0]) ? 1'b1 :
( bitstf && div_clk) ? p2s_q[0] : //p2s parallel to serial
(!bitstf && div_clk) ? 1'b0 : //A zero is inserted
nrzi_1q;
assign tx_dpi=
(!txvalid && !eop[0]) ? 1'b1 :
(div_clk && lastq ) ? 1'b1 :
(div_clk && eop[2] ) ? 1'b0 :
(div_clk && eop[3] ) ? 1'b0 :
div_clk ? !(tx_dp ^ nrzi_1q) : tx_dp;
assign tx_dmi=
(!txvalid && !eop[0]) ? 1'b0 :
(div_clk && lastq ) ? 1'b0 :
(div_clk && eop[2] ) ? 1'b0 :
(div_clk && eop[2] ) ? 1'b0 :
div_clk ? (tx_dp ^ nrzi_1q) : tx_dm;
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