ASIC/FPGA Design and Verification Out Source Services

Some tips in debugging an AMBA based SOC design.

1. When I participated in a project where ARM9 was involved, the RTL code was ready way before the arrival of the ARM9.


2. I used the LEON as a processor for its free code and usage of AMBA. This allowed integration to start as soon as RTL was delivered to the integrating team.


3. In my site there are also some simple AHB and APB masters for small test-benches (AMBA GEN).


4. I also recommend using an AHB monitor (available on this site). When tests start to be long in simulation terms, it is not easy to debug with waves. You create a log, see what module and on what time interval the problem occurs. Once you narrowed your search, record waves for only the offending modules.


5. ARM c code to verilog readmemhex format simulation.

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