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AHB and APB Generator

1. The AHBMST is controlled via its DMA interface. Currently only its inputs are used. According to those inputs, it generates AHB transactions.
2. The AHB transactions are replied by the APBMST. The latter has two interfaces. One is AHB slave, which responds to the AHB master. Following a request to generate an APB transaction, which comes on the AHB slave, the module initiates an APB transaction.
3. Last is the APB slave module. If addressed, it stores the data, which can be later read to verify AHB and APB transactions correctness on all the assorted buses.

The design is simulated using the free VHDL tool namely GHDL.
The VHDL code, compilation script as well as VCD dump of the simulation can be downloaded from the download area (file name is: AHB_APB_leon_1.tar.gz).

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