ASIC/FPGA Design and Verification Out Source Services

Update CMD9 and R2 crc calculation

The update of Sat May 24 20:58:19 IDT 2008 includes an R2 CID response with crc claclualtion bug fix (calculated on 120 bits and not on 128). The waves at end of the page currently also includes CMD9 and its R2 CSD response, followed by a CMD10 and response.

1. SD CSD constants:verilog Constants
2. SD CSD master print message:SD CSD master print message

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