ASIC/FPGA Design and Verification Out Source Services

Update CMD7 and R1b

The code supports now a R1b response to command 7. If address is matched the slave goes to transfer state. The output messages by the SD master verification code is as follows:

1. CRC7 : ( 40 bit) 0x000000000000000000004712340000 = 0101100 (0x2c)
2. Tx Command 7 0x07 param=0x12340000 data=0x471234000059 at 104100
3. GetResponse_R1 started at 107940
4. GetResponse_R1 started at 112100
5. CRC7 : ( 40 bit) 0x000000000000000000000700000000 = 0001011 (0x0b)
6. R1 response : Command 0x07 status 7 0x00000000 crc 0x00000000 data 0x0b 11
7. Status : 0x00000000
8. State was Idle

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