ASIC/FPGA Design and Verification Out Source Services

A simple example of verifying uniqueness in seed generating without leaving vim .

1. I had a regression report, which I needed to verify that all of its seeds were unique. This is to say each seed is used only once.
   


2. The report starts with some headers and each line, which follows the headers, describes a test result. This line also contains the seed value, which was used.
   



3. The headers are easily deleted from vim, using the DD command. The test lines are described below:
   

start simulation on machine machineA
number of tests 500
         fc_datapath_test 011812_142553 011812_142903 190 sec F 551777
txuart_counter_check_test 011812_142909 011812_143058 109 sec P 5860149

4. To verify uniqueness do the following steps:
   


5. A note about the marks: a and b: if you delete the header lines than mark a is on the start (line 1) and b at the very last line otherwise mark a is on the first non header line.
   


1. vim reg_rep.txt +/" F "
   Load file to vim and color failures.
   
2. 2 dd
   Delete all headers.
   
3. :g/.*_test.* [FP] \([0-9]*\).*/s//\1/
   Remove all data from line, except for seed value.
   
4. :'a,'b !sort
   Sort all lines.
   
5. :'a,'b !uniq
   Unique all lines.
   


6. Compare number of lines before and after unique commands are the same.
   

Also available on this project:

Home	Based on a VHDL simple UART, I created a small verification eVC, perfect for self study SD slave with Samsung flash (k9f1208) (vhdl project).