VHDL, verilog, design, verification, scripts, ...
Email: bknpk@hotmail.com Phone: +972-54-7649119



 

ASIC/FPGA Design and Verification Out Source Services

A simple c-code program to read a memory array from verilog RTL, using VPI.

  1. The former page discussed the simple verilog file, which served as the example's DUT. Then I explained the c code. This page presents the script, which used to compile and run this simple test.

  2. The script is generic and it assumes that both verilog and c code use the very same name. If any step in the script compilation (c, verilog, simulation) fails, the script stops.

  3. I used the free verilog simulator, icarus. It has a special command to compile the c-code vpi, iverilog-vpi, which makes life easier:
    clear;./cmp.unx itr | tee 1.txt

    #!/bin/bash

    rm $1.vvp *.vcd
    iverilog-vpi $1.c || exit
    iverilog -o$1.vvp $1.v || exit
    vvp -M. -m$1 $1.vvp || exit

  4. The code can be downloaded from:

Home

The usage of queues in C++ and the motivation to implement it for verification environments.






Search This Site


Feedback This Site




new pages on this site