ASIC/FPGA Design and Verification Out Source Services

This is my first systemc program.

1. Please note that a newer version of an APB slave does exist. This slave implements a simple memory device, using a sparse memory model. go
2. Please note that a parameterized CRC module in systemc is shown at: go


3. My first program is an APB slave. The logic is quite simple: not too much combinatorial logic and some registers.
4. The APB slave is build of a small memory with 256 cells. On reset all cells are cleared.
5. A generator is also included. The generator drives stimuli to design under test. In this simple case two transactions. A write followed by a read transaction.
6. Debug is by means of VCD waves. I used also printouts in the first bring up of the code.



7. The program, code and make file, are available at the download area. Look for the tar ball: SystemC_MyFirst.tar.gz.
   The code can also downloaded directly from: SystemC_MyFirst.tar.gz
8. My first bug in systemC was: First Bug.
9. For more systemC examples see below links:

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SD slave with Samsung flash (k9f1208) (vhdl project). my first example with systemc verification

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