ASIC/FPGA Design and Verification Out Source Services

This doc will show how to extract information from waveform, which is stored in VCD format.
The inputs to script are:

1. VCD file name.
2. Signal that defines a frame, like frame pulse in some SONET design, which I saw.
3. Signal, or bus, which we need data to be extracted from.
4. Output prefix file name.
5. Output suffix file name.
6. Data clock cycle.

The VCD file uses aliases for signal names. Each signal is replaced by short string. Parameters 2 and 3 are signal names. In the following example signal aliases definitions are shown:

7. ...
8. $var wire 11 % i[10:0] $end
9. $var wire 11 & o[10:0] $end
10. $var wire 14 ' s1[13:0] $end
11. $var wire 12 ( s1_a[11:0] $end
12. ...

Parameters 4 and 5 allow to control the output file name. There will be one file per each frame. The file name is a concatenation of: prefix, serial number and suffix.Last parameter is the cycle time. VCD files only denote changes in a signal. In this script the data per each clock cycle is required. Therefor the script keeps note on simulation time and can tell clock time period.


13. Scan the VCD wave format file and look for data byte values delimited by a frame pulse.
14. Write the extracted data in a simple format, which can be easily modified.
15. Data is written to separate files, each contains exactly one frame.

It would be helpful to use this script as an -how to do it guide- for getting vectors from a unit level functional simulation for a full chip functional or a gate-level one.

Home

SD slave with Samsung flash (k9f1208) (vhdl project).