ASIC/FPGA Design and Verification Out Source Services

One clock domain register (made by Flip-Flop devices) FIFO.

The following is a small design of a FIFO, which is built of Flip-Flop devices. I found the design some where on the web, fixed some bugs, created a test bench to test it and PERL script to automate the testing. This site will demonstrate all of the three.

1. The FIFO design:
2. The Test Bench:
3. The Regression Test Bench:
4. This project can be downloaded from the download area: (fifo_registers.tar.gz)

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FIFO Test-Bench Regression perl Script

Download Area SD slave with Samsung flash (k9f1208) (vhdl project).