ASIC/FPGA Design and Verification Out Source Services

Register FIFO Regression PERL Script

Scripts are required for verification environments to handle the setup, searching log file for important messages and automation.
This page shows an example for such script.

1. The regression is done via a PERL script named, run.pl. Its main features will be described below.


2. The regression script allows to run many tests. A test, which passes okay, the script deletes its simulation log, in order to save disk space. If a test fails, the log is zipped and saved for further inspection. During regression, wave generation is disabled.


3. Stop Mechanism:
   The script will run the design with different seeds in a loop. The script stops the regression if it detects an error in simulation or a file named stop.txt is found in the present working directory. The content of the file is not checked.


4. Random Number Generation:
   The following PERL commands are used to generate the seed value:
   
   $pl_seed=time ^ $$ or time ^ ($$ + ($$ << 15));
   srand($pl_seed);
   
   
   I found this seed generation a bit problematic. An easy fix is to use bash $RANDOM variable. This requires to create a tiny bash script:
   
   #!/bin/bash
   echo $RANDOM
   
   In the perl code change the above two lines with:
   
   $pl_seed=`/home/krengelp/bin/rand_number.unx`;
   chomp($pl_seed);
   srand($pl_seed);
   
   The simulation seed is random and unique. Whenever a new simulation seed is generated, it is checked if the new seed was already used, in the results file.
   
   ...
   #do not use the same seed twice
   $loop_flg=1;
   while($loop_flg == 1) {
     $sim_seed=rand($max_seed);
     $sim_seed= int($sim_seed);
   
     $cmd="grep -w " . $sim_seed . " reg_rep.txt";
     $d=`$cmd`; chomp($d);
     $loop_n=length($d);
     if($loop_n == 0) {$loop_flg=0;}
   }#while
   
   ...
   
   A method to check the seed uniqueness is also available on this site.


5. Compilation:
   Per each regression, the entire design has to be re-compiled, since the seed is changed in the test-bench. This is true for icarus simulator. For MTI, for instance, only the test bench can be compiled.


6. Simulation:
   Simulation is run right after compilation. There is no check, that the compilation ended without errors, as it is assumed the only change is in the seed value. At the end of the simulation, the log file is scanned. If an error is found, the regression is stopped. Two kinds of errors are tested:
   A) write on full or
   B) read on empty erred cases wrong read value, which indicates a malfunction of either the read or the write transaction Example:
   
   The simulation is run with a run loop script. All it does is to check, that the simulation did not fail on license availability. The script stops if it reached the number of tests (ARGV 0 or 10000 as default) or if it detects, in PWD, a stop.txt file (the file's content is irrelevant.).
   The script generates a seed value. If the test fails, it copies the simulation log to file name with seed in it. It also compresses the file. A regression report is also created. One line per run with time of start and stop, seed and successful flag.
   The regression script also renames the coverage output file (cadance specman ucd files). A script to clear the unneeded ucd files is also shown.
   
   scripts

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