Email:
bknpk@hotmail.com
Phone: +972-54-7649119
V
ASIC/FPGA Design and Verification Out Source Services
Digital Design Complex MultiplierInputs
Each input:
A
and
B
has the representation of:
A=a + jb and B=c + jd.
a, b, c and are 8 bits signed numbers.
The output Y=m +jn. m and n are 14 bits wide.
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